ECE 201 - Lab 4

 

Binary Arithmetic - Adders

 

PURPOSE

 

The student should demonstrate knowledge of simple binary arithmetic and the mechanics of its use. Each student is required to design, simulate, build, and test a two-bit full adder.

 

EQUIPMENT

 

ECE 201 Lab Kit & Digi-Trainer

Simulation Software

 

REQUIREMENTS

 

 

PROCEDURE

 

Section 1 – Adders

 

Consider the problem of adding two single-bit numbers, A and B, resulting in a single two-bit answer. The truth table for this operation is shown below:

 

A B S C

0 0 0 1

0 1 0 0

1 0 0 0

1 1 1 0

 

The two output functions are labeled ‘C’ and ‘S’, where  ‘S’ stands for ‘sum’ is the low order bit of the output. The ‘C’ stands for ‘carry’, and is the high order bit of the output.  The functions for S and C can be written as the two MSOP equations below:

                   C = AB             S = A’B + AB’

 

A circuit that implements these two functions is known as a half adder. This adder is referred to as a half adder because it only solves half the general problem of adding numbers with more than one bit. Let's take a look at an example of what happens when we add two 8-bit numbers:

 

                   Carry     1 0 1 1 1 0 0 0

                   A           1 0 1 1 1 0 0 1

                   B           1 0 1 0 1 1 0 0

                   Sum         0 1 1 0 0 1 0 1

Note that, except for the right most column, we are actually adding three bits: a bit from each of the 2 numbers and a carry bit from the bits immediately to the right. Note also that each addition produces 2 bits - the result bit (S), and the carry bit (C). Now, let's make a truth table for this addition process. The truth table will have three variables, one bit from each of the numbers A and B, and a carry in bit, Cin, which represents the carry from the previous position. The two outputs are the sum bit and the carry out bit, Cout, which will be used in the next position.

 

Cin A B   Cout S

 0 0 0    0  0

 0 0 1    0  1

 0 1 0    0  1

 0 1 1    1  0

 1 0 0    0  1

 1 0 1    1  0

 1 1 0     1  0

 1 1 1    1  1

 

We'll use Karnaugh maps to simplify the two functions in the table above into MSOP form:

 

 

Figure 1.  Full Adder Karnaugh Maps.

 

As shown above, the MSOP functions for S and Cout are:

 

     Sum = A’B’C + AB’C’+ A’BC’ + ABC     Cout = AB + AC +BC

 

We can implement the function for Cout in a straightforward manner, as shown below:

 

 

Figure 2.  Full Adder Carry Circuit.

The MSOP form S is a bit more complex, however. If we examine this function a bit more closely, though, we will see the now familiar checkerboard pattern in the K-map, and notice that S is only equal to 1 when an odd number of the input variables are 1 in the truth table.  The function for S can therefore be easily implemented with an EXOR function, as shown below:

 

Sum = A Å B Å C

 

 

Figure 3.  Full Adder Sum Circuit.

 

These two circuits together are called a full adder.

 

Section 2 – Building a 2-bit Full Adder

 

You are going to build a device which will add two unsigned 2-bit numbers. Use a pair of switches for each input value. The results will be displayed on LEDs. You will need to build two copies of the full adder. The carry input to the right most adder will be tied to GND. The carry in of the left adder will be tied to the carry out of the right adder.

 

?

What happens to the carry out of the left adder?

 

In block diagram form, the 2-bit Full Adder looks like:

 

 

Figure 4.  Full Adder Circuit.

You will need one 7486, two 7408’s and two 7432’s to build the above circuit.

 

In this simulation, you will build some simple circuits with gates and then use multiple copies of those circuits to build a larger, more complicated device. This is typical of how system design is done. We use this same kind of procedure with Computer Aided Design (CAD) tools, like your digital simulator.

Ideally, you would like to enter the circuit for a full adder once, test and debug it, then turn it into a part we can use over and over again. Then you could simply use two of those parts and draw the connections between them to build your two bit adder. This is called a hierarchichal design.

In Digital Works, hierarchy is achieved by using macros. You used a macro in the previous lab for the 7447 driver chip. This week, you will want to create your own macro for the full adder circuit. See the online Digital Works Getting Started guide for details on how.

Once your macro is created, you will create another schematic that uses two copies of the macro, and adding the switches and lights. Your resulting schematic should look like the block diagram of the circuit shown above.

HINT: It will probably be easier if you use one 7408 and one 7432 for each carry generator rather than using one chip for parts of both full adders. This way the two carry circuits can have identical pin assignments and also be physically separate to help avoid confusion. This also makes it possible for you to label the pins correctly inside your full adder macro.

You are to turn in copies of the schematic for you full-adder macro as well as your final circuit in lab.